1. Field of the Invention
The present invention relates to a temperature measuring device for a semiconductor apparatus installed in voltage converters for electronic systems of vehicles or the like.
2. Description of the Related Art
In recent onboard apparatus, a vehicle driving system 1100, as shown in FIG. 11, having an electric motor 1104 to generate driving force, may include the main sections of a power supply 1101, a buck-boost converter 1102, and an inverter 1103, to achieve high efficiency and energy saving. The three phase motor 1104 is a motor when it drives a vehicle, but becomes a generator when it brakes the vehicle. The arrow Y1 indicates the direction of energy flow when the vehicle is driven and the arrow Y2 indicates the direction of energy flow when the vehicle is braked.
The voltage VL of power supply 1101 is obtained from overhead wires or from series-connected batteries.
When the vehicle is driven, the buck-boost converter 1102 steps-up the voltage VL (280 V, for example) from the power supply 1101 to a voltage VH (750 V, for example) suited for driving the motor 1104; and when the vehicle is braked, the buck-boost converter 1102 steps-down the voltage VH (750 V, for example) that is generated by the motor 1104 to the voltage VL (280 V, for example) of the power supply circuit, performing regenerative braking.
When the vehicle is driven, the inverter 1103 supplies current to the phases of the three phase motor 1104 from the voltage VH that has been stepped-up by the buck-boost converter 1102 by ON-OFF controlling the switching elements in the inverter 1103. The speed of the vehicle is varied by the frequency of the ON-OFF switching. When the vehicle is braked, the inverter 1103 performs a rectification operation by ON-OFF controlling the switching elements in synchronism with the voltage generated in each phase of the motor 1104, and the inverter 1103 converts the voltage in the phases of the motor 1104 to a DC voltage by the rectification operation, resulting in regenerative braking.
Next, a detailed construction of the buck-boost converter 1102 is described with reference to FIG. 12. The buck-boost converter 1102 comprises main components of: a reactor R, a capacitor C, two switching elements SW1 and SW2, and two control circuits 1111 and 1112 for controlling the switching elements SW1 and SW2. Switching elements SW1 and SW2 in recent driving systems of onboard apparatus may each be composed of an IGBT 1105 (or 1106) and a diode D1 (or D2) connected in parallel with the IGBT 1105 (or 1106) between emitter and collector thereof as shown in FIG. 12. With this connection, the current in the diode D1 (or D2) flows in the reverse direction to the current in the IGBT 1105 (or 1106).
The following describes the principle of step-up and step-down operation of the buck-boost converter 1102. FIG. 13 shows the waveforms of the current flowing in the reactor R in the step-up operation.
The step-up operation is first described. When the IGBT 1105 of the switching element SW1 is in the ON state (conducting state) during the time periods from t0 to t1, from t2 to t3, and from t4 to t5 indicated in FIG. 13, electric current I flows in the reactor R and energy LI2/2 is stored in the reactor R having an inductance L.
In the OFF state (non-conducting state) of the IGBT 1105 of the switching element SW1 during the periods from t1 to t2, from t3 to t4, and after t5, electric current I flows through the diode D2 of the switching element SW2 and the energy stored in the reactor R is transferred to the capacitor C.
Next, step-down operation is described. In the ON state (conducting state) of the IGBT 1106 of the switching element SW2, current I flows through the reactor R and energy LI2/2 is stored in the reactor R.
In the OFF state (non-conducting state) of the IGBT 1106 of the switching element SW2, current flows through the diode D1 of the switching element SW1 and the energy stored in the reactor R is regenerated to the power supply 1101.
Thus, stepped-up and stepped-down voltages can be adjusted by varying ON time (ON duty factor) of the switching element SW1 and SW2. The following relation approximately holds.VL/VH=ON duty factor (%),where                VL is the power supply voltage,        VH is the voltage after the stepping-up operation; and        the ON duty factor is a fraction of a conducting period in the switching period of the switching element SW1 or SW2.        
In actual operation, however, to cope with variations in the load and power supply voltage, the stepped-up voltage VH is monitored and the ON time (or ON duty factor) of the switching element SW1 or SW2 is controlled to attain the target value of the voltage.
FIG. 14 is a block diagram of an intelligent power module (IPM) 2100 for a buck-boost converter. The main sections of IPM 2100 are a lower arm switching section 2101, an upper arm switching section 2102, and a control section 2103. The switching sections 2101 and 2102 are high voltage circuits that must be electrically isolated from the control section 2103, which is a low voltage circuit. Thus, signals are transmitted between the high and low voltage circuits through photo-couplers 2115, 2116, 2117, 2118, and 2119, pulse transformers (not depicted), or like circuit components.
The upper arm switching section 2102 comprises a temperature detecting diode 2142 that is embedded in a switching element chip SW12 together with IGBT 2112 and diode D12, an IGBT protecting circuit 2122 connected to the anode of the temperature detecting diode 2142 and to the point between series-connected resistances R1421 and R1422 that are provided between the emitter of the IGBT 2112 and ground, a gate driver 2124 connected to the output terminal of the IGBT protecting circuit 2122 and to a gate terminal of the IGBT 2112, and an IGBT chip temperature detecting unit 2126 connected to the anode of the temperature detecting diode 2142.
The lower arm switching section 2101 comprises a temperature detecting diode 2141 that is embedded in a switching element chip SW11 together with IGBT 2111 and diode D11, an IGBT protecting circuit 2121 connected to the anode of the temperature detecting diode 2141 and to the point between series-connected resistances R1411 and R1412 that are provided between the emitter of the IGBT 2111 and ground, a gate driver 2123 connected to the output terminal of the IGBT protecting circuit 2121 and to the gate terminal of the IGBT 2111, and an IGBT chip temperature detecting unit 2125 connected to the anode of the temperature detecting diode 2141, and a VH detecting circuit 2150 for detecting a stepped-up voltage VH.
The VH detecting circuit 2150 comprises a voltage dividing circuit 2151 for dividing the input voltage VH, a level adjusting circuit 2152 for adjusting a level of the voltage divided by the voltage dividing circuit 2151, a triangular wave generator 2153 for generating a triangular wave, and a comparator 2154 for comparing the triangular wave and the level adjusted voltage and delivering an “L” or “H” level voltage obtained by the comparison to a photo-coupler 2119.
The control section 2103 comprises a low pass filter (LPF) 2161 for smoothing a signal “0” corresponding to the “L” and the signal “1” corresponding to the “H” from the photo-coupler 2119 and converting them to DC level signals, a VH comparator 2162 for comparing the DC level signal from the LPF 2161 with a buck-boost instruction value, and a gate signal generator 2163 for delivering gate signals to the photo-couplers 2115 and 2117 so that the stepped-up voltage VH attains a predetermined voltage corresponding to the buck-boost instruction value in response to the comparison results from the VH comparator 2162.
In the IPM 2100 having the construction described above, the present invention relates in particular to the IGBT chip temperature detecting units 2125 and 2126 for detecting the chip temperature of the IGBTs 2111 and 2112 based on the VF voltages across the temperature detecting diodes 2141 and 2142 embedded in the switching element chips SW11 and SW12 in order to control operation of the IPM 2100 as a power system.
The IGBT chip temperature detecting unit 2126 in the upper arm switching section 2102 is selected as representative of the IGBT chip temperature detecting units 2125 and 2126 and described in detail in the following with reference to FIG. 15 which is a block diagram of the IGBT chip temperature detecting unit 2126, on the understanding that the operation of the IGBT chip temperature detecting unit 2125 is substantially the same.
The IGBT chip temperature detecting unit 2126 comprises, on the high voltage circuit side thereof, a constant current source 2170 connected to the anode of the temperature detecting diode 2142, a buffer circuit 2171 that is an operational amplifier having a + input terminal connected to the point between the constant current source 2170 and the temperature detecting diode 2142, a level converter 2177, a triangular wave generator 2178, a comparator 2179 that is an operational amplifier connected to the output terminal of the triangular wave generator 2178 and the output terminal of the level converter 2177, where the output terminal of the comparator 2179 is connected to a gate terminal of field effect transistor 2181 in a PWM-analogue converter 2190 through a resistance 2180 and the drain terminal of the field effect transistor 2181 is connected to a photo-coupler 2116 of the PWM-analogue converter 2190 through a resistance 2182.
The level converter 2177 comprises an operational amplifier 2173 with the − input terminal thereof connected to the output terminal of the buffer circuit 2171 through a resistance 2172, a resistance 2174 connected between the − input terminal and the output terminal of the operational amplifier 2173, and resistances 2175 and 2176 connected between a first power supply Vcc1 and the ground with the connection point between the two resistances connected to the + input terminal of the operational amplifier 2173.
The PWM-analogue converter 2190 further comprises the photo-coupler 2116, a binarization circuit 2191, a buffer circuit 2192, and an LPF circuit 2193.
The photo-coupler 2116 is connected between the first power supply Vcc1 and the FET 2181 and comprises a light emitting diode 2185 with a resistance 2184 connected in parallel thereto and a photo detecting diode 2187 that receives the light emitted by the light emitting diode 2185. The photo detecting diode 2187 is connected between the base terminal of a transistor 2188 and a second power supply Vcc2. A resistance 2189 is connected between the cathode of the photo detecting diode 2187 and the collector terminal of the transistor 2188.
The emitter terminal of the transistor 2188 of the photo-coupler 2116 is connected to the binarization circuit 2191, the output terminal of which is connected to the + input terminal of the buffer circuit 2192, an operational amplifier. The − input terminal of the buffer circuit 2192 is connected to the output terminal of the buffer circuit 2192, which is connected to the low pass filter (LPF) circuit 2193.
In operation of the IGBT chip temperature detecting unit 2126 to measure the temperature of the IGBT 2112, a constant current is fed from the constant current source 2170 to the temperature detecting diode 2142 embedded in the same chip as the IGBT 2112. The voltage VF across the temperature detecting diode 2142 (the voltage is also referred to as a “VF voltage signal”) exhibits a linear dependence on temperature as shown in FIG. 16. As shown in FIG. 16, the voltages VF are VF=1.5 V at T=165° C. and VF=2.0 V at T=25° C., where T is the chip temperature of the temperature detecting diode 2142. Thus, the full span for the actual temperature signal is a variation of the VF of 500 mV.
FIG. 17 shows a detailed construction of a VF/PWM conversion circuit having the buffer circuit 2171, the level conversion circuit 2177, the triangular wave generating circuit 2178, and the comparator 2179.
The triangular wave generator 2178 comprises a comparator 2201, an operational amplifier 2202; and resistances R21, R22, R23, R24, R25, R26, and a capacitor C11, which are connected as indicated in FIG. 17 to the − and + input terminals and the output terminals of the comparator 2201 and the operational amplifier 2202 or to the power supply Vcc1 or the ground.
The triangular wave generator 2178 delivers triangular wave signals with a predetermined range between an upper limit and a lower limit.
The forward voltage drop VF across the temperature detecting diode 2142 undergoes impedance conversion in the buffer circuit 2171, and is then amplified and subjected to addition and subtraction operation in the level converter 2177 so that the upper limit value of the triangular wave signal corresponds to the VF in the side of high temperature (165° C., for example), and the lower limit value of the triangular wave signal corresponds to the VF in the side of low temperature (25° C., for example).
The level converter 2177 performs gain adjustment and offset adjustment. The gain adjustment expands the width of the VF voltage signal so that the level of the width of the VF voltage signal matches the level of the width (amplitude) between the upper limit and the lower limit of the triangular wave signal. The offset adjustment makes the top and bottom levels of the expanded VF voltage signal in coincidence with the positions of the upper limit and the lower limit of the triangular wave. Specific gain and offset adjustment are carried out as follows.
As shown in FIG. 17, the voltage of the power supply Vcc1 is divided by the resistances R11 and R12 and given to the + input terminal of the operational amplifier 2173, and the amount of offset is determined by the resistance R13 connected between the power supply Vcc1 and the − input terminal of the operational amplifier 2173. The gain of the operational amplifier 2173 is determined by the resistance R14 connected between the output terminal of the buffer circuit 2171 and the − input terminal of the operational amplifier 2173 and the resistance R15 connected between the − input terminal and the output terminal of the operational amplifier 2173.
After this level adjustment, a comparator 2179 in the next stage compares the output voltage Vlev of the level converter 2177 and the output voltage Vtri of the triangular wave generator 2178. If Vlev>Vtri, then the output of the comparator 2179 is “L”; if Vlev<Vtri, then the output is “H”.
The duty factor of the output pulses of the comparator 2179 thus generated is proportional to the VF voltage signal. For example, a duty factor of zero % corresponds to a low temperature (25° C.) side VF and a duty factor of 100% corresponds to a high temperature (165° C.) side VF. The PWM signal bearing the VF voltage signal is transmitted, through the isolated transmission circuit of the photo-coupler 2116 or 2118, from the upper arm switching section 2101 or the lower arm switching section 2102 to the binarization circuit 2191 in the control section 2103.
From the PWM signal, the binarization circuit 2191 generates and outputs a voltage, a binarized signal V1/V2, which is V1 for zero % of the duty factor of the PWM signal and V2 for 100% of the duty factor. The binarized signal V1/V2 receives impedance conversion in the buffer circuit 2192 and then smoothed in the LPF circuit 2193 to be converted into a DC level signal.
Thus, an IGBT chip temperature voltage signal Vout, which is an output voltage isolated from each arm, is obtained.
Thus-obtained voltage signal Vout proportional to the IGBT chip temperature is transmitted to a system at a higher level (not depicted in the drawings) in the buck-boost converter 1102. Monitoring the temperatures of the IGBTs 2111 and 2112 continuously, the higher level system works, for example to reduce the switching frequency to a half when the IGBT chip temperature exceeds a first predetermined temperature T1 and to stop switching operation (or buck-boost operation) in order to perform a protecting function when the IGBT chip temperature exceeds a second predetermined temperature T2.
Execution of the protecting function affects driving the vehicle, so the chip temperature of the IGBTs 2111 and 2112 must be measured accurately - - - with an accuracy in the range of about ±5%. Error factors in chip temperature measurement can be the scattering of characteristics of two categories of components; the scattering of the forward voltage drop VF and the temperature coefficient thereof of the temperature detecting diodes 2141 and 2142 embedded in the IGBT chip, and the scattering of the characteristics of the circuits including the buffer circuit 2171, the level converter 2177, the triangular wave generator 2178, the photo-coupler 2116 (which is an isolated transmission circuit for PWM signals), the binarization circuit 2191, the buffer circuit 2192, and the LPF circuit 2193.
The scattering of the VF values of the temperature detecting diodes 2141 and 2142 is primarily caused by semiconductor processing. If the scattering of the VF values is estimated to be ±3%, which is about 60% of the overall allowed error of ±5%, the error permitted for the other circuit components is ±2%. This requires each of the other circuit components to be within an error suppressed to about ±0.5%.
Accordingly, high accuracy products must be used for circuit components including resistance elements, constant voltage elements, and operational amplifiers. In consideration of guaranteeing operation over a wide temperature range of −40° C. to +105° C. for the onboard environment, high reliability required by onboard applications, and quick response to customer complaints, selection of those circuit components should be made from ICs for onboard applications supplied by major manufacturers of semiconductor products.
As shown in FIG. 15, the forward voltage drop VF across the temperature detecting diode 2142 developing with the constant current IF supplied by the constant current source 2170 is given to the + terminal of the buffer circuit 2171 and receives impedance conversion there, and is delivered to the level converter 2177. The forward voltage drop VF corresponds to the temperature of the temperature detecting diode 2142 and may have values of, for example, VF=1.5 V for a chip temperature of 165° C. and VF=2.0 V for 25° C.
As shown in FIG. 17, the + input terminal of the operational amplifier 2173 of the level converter 2177 is fixed to an electric potential of Vcc11 that is a divided voltage of the potential of the power supply Vcc1 divided by the resistances R11 and R12. The output voltage Vlev of the operational amplifier 2173 is given by the equation (1) below.
                              V          lev                =                              V                          cc              ⁢                                                          ⁢              11                                -                                    R              15                        ⁡                          (                                                                                          V                                              cc                        ⁢                                                                                                  ⁢                        1                                                              -                                          V                                              cc                        ⁢                                                                                                  ⁢                        11                                                                                                  R                    13                                                  +                                                                            V                      F                                        -                                          V                                              cc                        ⁢                                                                                                  ⁢                        11                                                                                                  R                    14                                                              )                                                          (        1        )            
The upper limit value Vsu and the lower limit value Vsd of the triangular wave signal from the triangular signal generator 2178 are given by the equations (2) and (3) below. Here, the − input terminal of the comparator 2201 is fixed to an electric potential of Vcc12 that is a divided voltage of the potential of the power supply Vcc1 divided by the resistances R21 and R22.
                              V          su                =                              V                          cc              ⁢                                                          ⁢              12                                +                                    R              26                        ⁡                          (                                                                    V                                          cc                      ⁢                                                                                          ⁢                      12                                                        -                                      V                                          ic                      ⁢                                                                                          ⁢                      3                      ⁢                      LOW                                                                                        R                  25                                            )                                                          (        2        )                                          V          sd                =                              V                          cc              ⁢                                                          ⁢              12                                -                                                    R                26                            ⁡                              (                                                                            V                                              cc                        ⁢                                                                                                  ⁢                        1                                                              -                                          V                                              cc                        ⁢                                                                                                  ⁢                        12                                                                                                                                                R                        23                                            +                                              R                        24                                                              //                                          R                      25                                                                      )                                      ×                                          R                24                                                              R                  24                                +                                  R                  25                                                                                        (        3        )            
The Vic3LOW in equation (2) represents the “L” level output voltage of the comparator 2201. The symbol “//” in equation (3) is a simplified representation of a combined resistance of the parallel connected resistances indicated at the both sides of the symbol “//”. The representation “R24//R25”, for example, indicates a combined resistance of the resistances R24 and R25 that are connected in parallel.
The comparator 2179 compares the output signal of triangular wave having the upper limit value Vsu and the lower limit value Vsd from the triangular wave generator 2178 with the output signal of the level converter 2177. The comparator 2179 generates a PWM signal with a pulse width corresponding to the chip temperature as given by equations (4), (5), and (6) below.Condition 1: Vsu≧Vlev Duty=100%  (4)Condition 2: Vsu≧Vlev≧Vsd Duty=(Vlev−Vsd)/(Vsu−Vsd) (%)  (5)Condition 3: Vsd≧Vlev Duty=0%  (6)
The PWM signal is transmitted successively, as shown in detail in FIG. 18, through the photo-coupler 2116 in the PWM-analogue converter 2190, to the binarization circuit 2191, comprising transistor 2250 and resistors R30, R31, R32 and R628, the buffer circuit 2192, comprising operational amplifier IC601 in section 2190a, and the LPF circuit 2193, which comprises resistor R637 and capacitor C604. The relation between the duty factor Duty of the PWM signal and the output VLPF of the LPF circuit 2193, which is the IGBT chip temperature voltage signal Vout, is given by the equation (7) below.
                              V          LPF                =                                                                              R                  32                                ×                                  V                                      cc                    ⁢                                                                                  ⁢                    2                                                                                                R                  31                                +                                  R                  32                                                      ⁢            Duty                    +                                    {                                                V                                      cc                    ⁢                                                                                  ⁢                    2                                                  -                                                                                                    V                                                  cc                          ⁢                                                                                                          ⁢                          2                                                                    -                                                                                                    R                            32                                                    ⁢                                                      V                            ce                                                                                                                                R                            30                                                    +                                                      R                            32                                                                                                                                                              R                        32                                            +                                              R                        31                                            -                                                                        R                          32                                                                                                      R                            30                                                    +                                                      R                            32                                                                                                                                ⁢                                      R                    31                                                              }                        ×                          (                              1                -                Duty                            )                                                          (        7        )            
In the equation (7), Vice is a collector-emitter voltage of the transistor 2250 in a saturated condition, and is about 0.15 V. As can be seen from the equations (1), (2), (3), and (7), the error in the output of the LPF circuit 2193 depends on the scattering of the voltages of the power supplies Vcc1 and Vcc2 when resistance elements with high accuracy of ±0.1% are used.
The power supply Vcc1, in particular, which is used in a circuit managing a signal with a full span of 500 mV, is necessarily a voltage source with high stability and high accuracy. Accordingly, a shunt regulator with high accuracy should be used. The power supply Vcc2, on the other hand, which manages a signal with a full span of 4 V, does not need such accuracy as the one required for the power supply Vcc1.
FIG. 19 shows the distribution of the electric potential of the power supply Vcc1 that is supplied from a shunt regulator; and FIG. 20 shows the distribution of the electric potential of the power supply Vcc2 that is supplied from a high accuracy voltage regulator.
The scattering of the voltages of the reference voltage sources, i.e. the variation of the voltages Vcc1 and Vcc2, affects the span and the offset of the output voltage VLPF of the LPF circuit corresponding to the chip temperature, as can be seen from the equations (1), (2), (3), and (7). The span is basically assigned to be 130° C. for the temperature and 4 V for the output voltage; and the offset is assigned to be 4.5 V at a temperature of 25° C.
FIGS. 21 and 22 show the effects of the variation of the voltage of Vcc1 on the output of the LPF circuit 2193. FIGS. 23 and 24 show the effects of the variation of the voltage of Vcc2 on the output of the LPF circuit 2193.
A normal distribution is assumed for the distribution of output voltage of Vcc1 and Vcc2, and statistical calculations have been made for errors and accumulated distribution rate in the interval in the IGBT chip temperature voltage signal Vout (which is the LPF output) in the range up to 3σ from the center of the distribution. The calculation result has revealed that the error in temperature measurement of the circuit is suppressed to within ±2.88% in the range of 1.2σ including 77% of population, but the error exceeds ±2.88% in the remaining 23% of population. Accordingly, the resistance value of the resistance R13 in the level converter 2177 in FIG. 17 needs to be changed for offset adjustment and the resistance value of the resistance R15 needs to be changed for gain adjustment.
For the resistances R13 and R15, resistance elements with low resistance values are preliminarily packaged in order to allow later adjustment within ±5σ. The target resistance value may be achieved by partially cutting the resistance pattern of the low resistance elements with a laser trimming device.
In this resistance adjustment procedure, two known voltages VF1 and VF2 are given as input signals to the chip temperature measuring circuit and two output voltage Vout1_m and Vout2_m are measured to determine the respective differences from the target voltage values Vout1_s and Vout2_s. Based on the differences obtained, the target resistance values of the resistances R13 and R15 are determined and the trimming is carried out on R13 and R15.
After that, two known voltages VF1 and VF2 are again given to the chip temperature measuring circuit after the trimming process and the output voltages Vout1_m and Vout2_m are measured to ensure that the measured values fall within allowable error from the target voltage values Vout1_s and Vout2_s. 
This adjusting procedure requires a costly laser trimming device and some man-hours for resistance adjusting work, thus leading to higher manufacturing cost. Because re-adjustment is impossible once the trimming is conducted, an additional unsolved problem is present in that the procedure involves to some extent a percentage of defective units.
To cope with this problem, methods are known to conduct temperature compensation of the chip temperature measuring circuit by an electronic process.
Japanese Patent No. 4141444 and Japanese Patent No. 4229945, for example, disclose an onboard engine control device provided with a micro-processor having a non-volatile memory that stores a control program and control constants written in through an external tool, and a RAM memory for operational processing. This onboard engine control device comprises a constant voltage power supply circuit, a temperature sensor, and a multi-channel AD converter.
The non-volatile memory further stores calibration data and conversion data. The calibration data is the results of measurement with an externally equipped instrument and transferred through an external tool to write-in to the non-volatile memory in the adjusting operation stage of the onboard engine control device. The calibration data include externally measured data about the temperature around the constant voltage power supply circuit estimated from the environment temperature at the time of adjusting operation and about the actual output voltage of the constant voltage power supply circuit at the time of adjusting operation.
The conversion data include the data about variation characteristics of the environment temperature versus output voltage of the constant voltage power supply circuit, the data being actually measured in advance on multiple of products and statistically processed to obtain averaged voltage variation characteristics.
An output voltage of the constant voltage power supply circuit under a different temperature environment is estimated from a detected output of the temperature detecting sensor referring to the calibration data and the conversion data. The estimated output voltage is divided by the constant voltage to obtain a correction factor, by which is multiplied a digitalized value of an analogue input voltage to obtain a corrected digital voltage value.
Japanese Unexamined Patent Application Publication No. 2008-116233 discloses a method of calibrating an output of a temperature detecting diode of a switching element. The calibration in the above reference is conducted with a temperature correction factor based on a detected motor temperature after combining the motor and a detected temperature of the switching element. Temperature characteristics of the temperature detecting diode and the calibration factor (the temperature correction factor) are stored in a memory or other recoding medium.
Japanese Unexamined Patent Application Publication No. 2005-333667 discloses a semiconductor device that comprises a temperature detecting means that detects an operating temperature of a semiconductor switching element, an overheat protecting means that stops operation of the semiconducting switching element if a detected signal of the temperature detecting means exceeds a prescribed trip level stored in a non-volatile memory, and a characteristic correction means that corrects the trip level.
Japanese Unexamined Patent Application Publication No. 2004-117111 discloses a technology in which a temperature measuring diode is formed in a semiconductor element and temperature data is obtained at the position of the temperature measuring diode from the temperature characteristics of forward voltage drop of the temperature measuring diode. On the other hand, a sense current flowing through a current sense emitter is measured with a current detecting circuit and a corrected temperature is calculated in an operating unit based on the sense current value. The operating unit obtains a junction temperature by adding a temperature correction to the temperature data. A table of temperature correction is stored in a memory for current values detected with the current detecting circuit. Upon receiving a current value detected with the current detecting circuit, a temperature correction is calculated referring to the table.
In the conventional technology disclosed in Japanese Patent No. 4141444 and Japanese Patent No. 4229945, conversion data, which is temperature-output voltage characteristic in standard characteristics, is stored in a non-volatile memory. In the technology also stored is calibration data, which includes calibration temperature on an adjusting operation stage of the onboard engine control device and output voltage at the calibration temperature. When an actual temperature is measured, a constant voltage output at the actual measurement temperature is calculated according to a predetermined calculation formula referring to the calibration data and the conversion data stored in the non-volatile memory. The calculated constant voltage output is divided by a reference voltage to calculate a correction factor, by which a digitalized voltage is multiplied to obtain a corrected digital voltage.
Therefore, a non-volatile memory must store the calibration data and the conversion data, increasing memory capacity. In addition, the calculation operation needs to be repeated referring to the calibration data and the conversion data every time the actual temperature changes, increasing calculation operation load.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2008-116233, with a motor driving device combined, the difference between the motor temperature calculated in a motor temperature calculating section and the switching element temperature calculated in a switching element temperature calculating section is stored in a memory or other recording medium as a calibration value or a temperature correcting factor for correcting the calculation result in the switching element temperature calculating section. Offset correction is conducted by correcting the output from the diode for switching element temperature detection using the calibration value (or the temperature correcting factor). In the conventional technology of Japanese Unexamined Patent Application Publication No. 2008-116233, however, the calibration value is simply added to the output from the diode for switching element temperature detection. Therefore, the technology cannot be applied to a case where a gradient of the temperature-output voltage characteristic line is varied.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2005-333667, correction of the trip level that is the basis for decision of overheating is conducted by selecting the number of capacitors that are connected according to a characteristic correction signal written in an EPROM. Therefore, this technology also cannot be applied to a case where a gradient of the temperature-output voltage characteristic line is varied.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2004-117111, temperature correction is calculated based on the sense current flowing through the current sensing emitter of the semiconductor element referring to the table of current versus temperature correction stored in a memory. The temperature correction is added to a temperature data obtained by a temperature detecting circuit to calculate a junction temperature. Therefore, this technology also cannot be applied to a case where a gradient of the temperature-output voltage characteristic is varied.